1. FIELD OF THE INVENTION
This invention relates to flip flop circuits and, more specifically, to flip flops of the RS and D type using schottky transistor logic (STL).
2. BRIEF DESCRIPTION OF THE PRIOR ART
STL is a VLSI type of logic wherein almost all operations are performed at the gate level. A problem with STL logic is that everything must work from a two volt power supply instead of a five volt supply. For this reason, prior art STL devices, when conformed, for example, to provide a D type flip flop, required a pair of data gates, a pair of clock gates and a pair of output gates. A typical such configuration as shown in FIG. 1 requires about thrity-one components and involves three gate delays from the clock to the output. It is evident that, not only is it desirable to reduce the number of components in order to improve yield and increase the logic function density of the semiconductor chip, but also, that a reduced number of components will provide a decrease in the power requirement for performance of the logic function involved.